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| NLAS7222A High-Speed USB 2.0 (480 Mbps) DPDT Switch ON Semiconductor's NLAS7222A series of analog switch circuits are produced using the company's advanced sub-micron CMOS technology, achieving industry-leading performance. The NLAS7222A is a 2- to 1-port analog switch. Its wide bandwidth and low bit-to-bit skew allow it to pass high-speed differential signals with good signal integrity. The switch is bidirectional and offers little or no attenuation of the high-speed signals at the outputs. Industry-leading advantages include a propagation delay of less than 250 ps, resulting from its low channel resistance and low I/O capacitance. Its high channel-to-channel crosstalk rejection results in minimal noise interference. Its bandwidth is wide enough to pass High-Speed USB 2.0 differential signals (480 Mb/s). Features http://onsemi.com MARKING DIAGRAM WQFN-10 CASE 488AQ 1 XX M G G UQFN-10 CASE 488AT 1 * * * * * * * * * * * XX M G G RON is Typically 6.5 W at VCC = 3 V Low Bit-to-Bit Skew: Typically 50 ps OVT on D+ and D- up to 3.6 V Power OFF Protection: When VCC = 0 V, D+ and D- Can Tolerate up to 3.6 V Low Crosstalk: -45 dB @ 250 MHz Low Current Consumption: 1 mA Near-Zero Propagation Delay: 250 ps Channel On-Capacitance: 6.5 pF (Typical) VCC Operating Range: +3.0 V to +3.6 V > 700 MHz Bandwidth (or Data Frequency) This is a Pb-Free Device Device Code xx = 2A or Y = Date Code M G = Pb-Free Device (Note: Microdot may be in either location) XX = ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. Typical Applications * Differential Signal Data Routing * USB 2.0 Signal Routing Important Information * Continuous Current Rating Through Each Switch 50 mA * 8 kV I/O to GND ESD Protection (c) Semiconductor Components Industries, LLC, 2007 1 February, 2007 - Rev. 1 Publication Order Number: NLAS7222A/D NLAS7222A HSD1- 7 HSD2- 6 Table 1. PIN DESCRIPTION Pin S 5 Function Select Input Output Enable Data Ports OE VCC 8 D- GND OE HSD1+, HSD1-, HSD2+, HSD2-, D+, D- 9 CONTROL 4 S 10 3 D+ Table 2. TRUTH TABLE OE 1 0 0 S X 0 1 HSD1+, HSD1- OFF ON OFF HSD2+, HSD2- OFF OFF ON 1 2 HSD1+ HSD2+ Figure 1. Pin Connections and Logic Diagram (Top View) MAXIMUM RATINGS Symbol VCC VIS Positive DC Supply Voltage Analog Switch Input Voltage HSD1+, HSD1-, HSD2+, HSD2- D+, D- Digital Select Input Voltage Continuous DC Current (Through Analog Switch) Power Dissipation Storage Temperature Human Body Model I/O to GND All Pins Parameter Value -0.5 to +4.6 -0.5 to VCC + 0.3 -0.5 to +4.6 -0.5 to +4.6 50 0.5 -65 to +150 8 2 Unit V V VIN ID PD TS ESD V mA W C kV Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. RECOMMENDED OPERATING CONDITIONS Symbol VCC VIS VOS VIN TA tr, tf Positive DC Supply Voltage Analog I/O Voltage (HSD1+, HSD1-, HSD2+, HSD2-) Analog Common Output Voltage (D+, D-) Digital Select Input Voltage Operating Temperature Range Input Rise or Fall Time VCC = 3.3 V 0.3 V Parameter Min 3.0 GND GND GND -40 0 Max 3.6 VCC 3.6 VCC +85 15 Unit V V V V C ns http://onsemi.com 2 NLAS7222A DC ELECTRICAL CHARACTERISTICS FOR USB 2.0 SWITCHING OVER OPERATIONAL RANGE -40C to +85C Symbol VIH VIL VIK ICC ICCT II IOZ IOFF RON RFLAT(ON) DRON Parameter Input HIGH Voltage (VIN) Input LOW Voltage (VIN) Clamp Diode Voltage Quiescent Supply Current Increase in ICC per Control Voltage Input Leakage Current OFF State Leakage Power OFF Leakage Current (D+, D-) Switch On-Resistance On-Resistance Flatness On-Resistance match from center ports to any other ports IIS = -18 mA VIS = VCC or GND; ID = 0 A VIN = 2.6 V 0 VIS VCC 0 VIS; VOS VCC 0 VIS; VOS VCC VIS = 0 to 0.4 V; ID = 8 mA VIS = 0 to 1.0 V; ID = 8 mA VIS = 0 to 0.4 V; ID = 8 mA Test Conditions VCC (V) 3.0 to 3.6 3.0 to 3.6 3.0 3.6 3.6 3.6 3.6 0 3.0 3.0 3.0 Min 1.3 - - - - - - - - - - Typ (Note 1) - - - - - - - - 6.5 2.0 0.35 Max - 0.5 -1.2 1.0 10.0 1.0 1.0 1.0 9.0 - - Unit V V V mA mA mA mA mA W W W 1. Typical values are at VCC = 3.3 V and TA = +25C AC ELECTRICAL CHARACTERISTICS -405C to +855C Symbol tON tOFF tBBM tPD OIRR XTALK BW Parameter Turn-ON Time Turn-OFF Time Break-Before-Make Delay Propagation Delay OFF-Isolation Non-Adjacent Channel Crosstalk -3 dB Bandwidth Test Conditions VIS = 0.8 V VIS = 0.8 V VIS = 0.8 V CL = 10 pF f = 250 MHz; RL = 50 W f = 250 MHz; RL = 50 W RL = 50 W; CL = 0 pF RL = 50 W; CL = 5 pF VCC (V) 3.0 to 3.6 3.0 to 3.6 3.0 to 3.6 3.0 to 3.6 3.0 to 3.6 3.0 to 3.6 3.0 to 3.6 Min - - 2.0 - - - - - Typ (Note 2) 13.0 12.0 4.7 0.25 -28 -45 700 500 Max 30.0 25.0 6.5 - - - - - Unit ns ns ns ns dB dB MHz AC ELECTRICAL CHARACTERISTICS FOR USB 2.0 SWITCHING OVER OPERATIONAL RANGE tSK(O) TJITTER Channel-to-Channel Skew Total Jitter CL = 10 pF RL = 50 W; CL = 10 pF tr = tf = 500 ps at 480 Mbps 3.0 to 3.6 3.0 to 3.6 - - 0.05 0.2 - - ns ns 2. Typical values are at VCC = 3.3 V and TA = +25C CAPACITANCE -405C to +855C Symbol CIN CON COFF Parameter Control Pin Input Capacitance HSD+, HSD- ON Capacitance HSD+, HSD- OFF Capacitance VCC = 0 V VCC = 3.3 V; OE = 0 V VCC = VIS = 3.3 V; OE = 3.3 V Test Conditions Min - - - Typ (Note 3) 4.5 14 12 Max - - - Unit pF pF pF 3. Typical values are at VCC = 3.3 V and TA = +25C http://onsemi.com 3 NLAS7222A DUT VCC 0.1 mF 50 W Output VOUT 35 pF tBMM Output 50 % OF DROOP Switch Select Pin VOLTAGE DROOP Input GND VCC Figure 2. tBBM (Time Break-Before-Make) VCC DUT VCC 0.1 mF Open Output VOUT 50 W 35 pF Output VOL Input tON tOFF Input 0V VOH 90% 90% 50% 50% Figure 3. tON/tOFF VCC DUT Output Open 50 W VOUT 35 pF Input VCC 50% 0V VOH Output VOL 10% tOFF tON 10% 50% Input Figure 4. tON/tOFF http://onsemi.com 4 NLAS7222A 50 W Reference Input Output 50 W Generator 50 W DUT Transmitted Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction. VISO = Off Channel Isolation = 20 Log VONL = On Channel Loss = 20 Log VOUT VIN for VIN at 100 kHz VOUT for VIN at 100 kHz to 50 MHz VIN Bandwidth (BW) = the frequency 3 dB below VONL VCT = Use VISO setup and test to all other switch analog input/outputs terminated with 50 W Figure 5. Off Channel Isolation/On Channel Loss (BW)/Crosstalk (On Channel to Off Channel)/VONL DUT Open Output VIN VCC GND CL Output Off Off DVOUT VIN On Figure 6. Charge Injection: (Q) http://onsemi.com 5 NLAS7222A APPLICATIONS INFORMATION The low on resistance and capacitance of the NLAS7222A provides for a high bandwidth analog switch suitable for applications such as USB data switching. Results for the USB 2.0 signal quality tests will be shown in this section, along with a description of the evaluation test board. The data for the eye diagram signal quality and jitter tests verifies that the NLAS7222A can be used as a data switch in low, full and high speed USB 2.0 systems. Figures 7, 8 and 9 provide a description of the test evaluation board. The USB tests were conducted per the procedures provided by the USB Implementers Forum (www.usb.org), the industry group responsible for defining the USB certification requirements. The test patterns were generated by a PC and MATLAB software, and were inputted to the analog switch through USB connectors J1 (HSD1) or J2 (HSD2). A USB certified device was plugged into connector J4 to function as a data transceiver. The high speed and full speed tests used a flash memory device, while the low speed tests used a mouse. Test connectors J3 and J5 provide a direct connection of the USB device and were used to verify that the analog switch does not distort the data signals. Figure 7. Schematic of the NLAS7222A USB Demo Board http://onsemi.com 6 NLAS7222A Figure 8. Block Diagram of the NLAS7222A USB Demo Board Figure 9. Photograph of the NLAS7222A USB Demo Board http://onsemi.com 7 NLAS7222A AND8267/D - NLAS7222A USB 2.0 Signal Quality Compliance Tests Figures 10, 11 and 12 show the test results for USB eye diagram tests. A summary of the USB tests is provided in Table 3. The NLAS7222A passes the low, full and high speed signal quality, eye diagram and jitter tests. Application note AND8267/D provides a detailed description of the USB 2.0 test results. Figure 10. Low Speed Signal Quality Eye Diagram Test (NLAS7222A with VCC = 3.6 V) Figure 11. Full Speed Signal Quality Eye Diagram Test (NLAS7222A with VCC = 3.6 V) http://onsemi.com 8 NLAS7222A Figure 12. High Speed Signal Quality Eye Diagram Test (NLAS7222A with VCC = 3.0 V) Table 3. Summary of the USB 2.0 Signal Quality Tests Results Compliance Test Signal Quality Test Signal Eye Test EOP Width Measured Signal Rate Crossover Voltage Range Connective Jitter Range Paired JK Jitter Range Paired KJ Jitter Range Pass Pass 1.29 ms 1.5140 MHz 1.75 to 1.83 V, mean crossover = 1.78 V -2.2 to 2.2 ns, RMS jitter = 1.3 ns -1.4 to 2.7 ns, RMS jitter = 1.3 ns -1.9 to 1.1 ns, RMS jitter = 1.0 ns Low Speed Pass Pass 166.86 ns 12.0016 MHz 1.70 to 1.73 V, mean crossover = 1.71 V -0.2 to 0.2 ns, RMS jitter = 0.1 ns -0.1 to 0.1 ns, RMS jitter = 0.1 ns -0.2 to 0.1 ns, RMS jitter = 0.1 ns Full Speed Pass Pass 7.98 bits 480.0685 MHz N/A -79.4 to 77.4 ps, RMS jitter = 35.0 ps -93.2 to 78.7 ps, RMS jitter = 24.4 ps -72.8 to 50.9 ps, RMS jitter = 15.6 ps High Speed ORDERING INFORMATION Device NLAS7222AMTR2G NLAS7222AMUR2G Package WQFN-10 (Pb-Free) UQFN-10 (Pb-Free) 3000 / Tape & Reel Shipping For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 9 NLAS7222A PACKAGE DIMENSIONS WQFN10, 1.4x1.8x0.4P CASE 488AQ-01 ISSUE B D A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. 5. EXPOSED PADS CONNECTED TO DIE FLAG. USED AS TEST CONTACTS. DIM A A1 A3 b D E e L L1 MILLIMETERS MIN MAX 0.70 0.80 0.00 0.050 0.20 REF 0.15 0.25 1.40 BSC 1.80 BSC 0.40 BSC 0.30 0.50 0.40 0.60 PIN 1 REFERENCE 2X 0.15 C 0.15 C 2X 0.10 C 0.08 C A1 A3 3 9X 5 6 1 L e 0.663 0.0261 0.200 0.0079 10 X L1 EEE EEE EEE 10 E B A SEATING PLANE C SOLDERING FOOTPRINT* 1.700 0.0669 9X e/2 0.563 0.0221 b 0.10 C A B 0.05 C NOTE 3 1 2.100 0.0827 0.400 0.0157 PITCH 10 X 0.225 0.0089 SCALE 20:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 10 NLAS7222A PACKAGE DIMENSIONS 10 PIN UQFN, 1.4x1.8, 0.4P CASE 488AT-01 ISSUE O D A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DIM A A1 b D E e L L3 MILLIMETERS MIN MAX 0.45 0.60 0.00 0.05 0.15 0.25 1.40 BSC 1.80 BSC 0.40 BSC 0.30 0.50 0.40 0.60 PIN 1 REFERENCE 2X 0.10 C 0.10 C 2X 0.05 C 0.05 C 10X 9X L 6 1 L3 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative EEE EEE EEE A A1 3 5 10 10 X E B C SEATING PLANE MOUNTING FOOTPRINT* 1.700 0.0669 9X e/2 0.663 0.0261 0.200 0.0079 0.10 C A B 0.05 C NOTE 3 0.563 0.0221 e 1 b 2.100 0.0827 0.400 0.0157 PITCH 10 X 0.225 0.0089 SCALE 20:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 11 NLAS7222A/D |
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